Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
37 lines
1.5 KiB
C
37 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2017, The Linux Foundation. All rights reserved.
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*/
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#ifndef QCOM_PHY_QMP_PCS_USB_V5_H_
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#define QCOM_PHY_QMP_PCS_USB_V5_H_
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/* Only for QMP V5 PHY - USB3 have different offsets than V4 */
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#define QPHY_V5_PCS_USB3_POWER_STATE_CONFIG1 0x000
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#define QPHY_V5_PCS_USB3_AUTONOMOUS_MODE_STATUS 0x004
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#define QPHY_V5_PCS_USB3_AUTONOMOUS_MODE_CTRL 0x008
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#define QPHY_V5_PCS_USB3_AUTONOMOUS_MODE_CTRL2 0x00c
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#define QPHY_V5_PCS_USB3_LFPS_RXTERM_IRQ_SOURCE_STATUS 0x010
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#define QPHY_V5_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR 0x014
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#define QPHY_V5_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x018
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#define QPHY_V5_PCS_USB3_LFPS_TX_ECSTART 0x01c
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#define QPHY_V5_PCS_USB3_LFPS_PER_TIMER_VAL 0x020
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#define QPHY_V5_PCS_USB3_LFPS_TX_END_CNT_U3_START 0x024
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#define QPHY_V5_PCS_USB3_LFPS_CONFIG1 0x028
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#define QPHY_V5_PCS_USB3_RXEQTRAINING_LOCK_TIME 0x02c
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#define QPHY_V5_PCS_USB3_RXEQTRAINING_WAIT_TIME 0x030
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#define QPHY_V5_PCS_USB3_RXEQTRAINING_CTLE_TIME 0x034
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#define QPHY_V5_PCS_USB3_RXEQTRAINING_WAIT_TIME_S2 0x038
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#define QPHY_V5_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x03c
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#define QPHY_V5_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x040
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#define QPHY_V5_PCS_USB3_RCVR_DTCT_DLY_U3_H 0x044
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#define QPHY_V5_PCS_USB3_ARCVR_DTCT_EN_PERIOD 0x048
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#define QPHY_V5_PCS_USB3_ARCVR_DTCT_CM_DLY 0x04c
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#define QPHY_V5_PCS_USB3_TXONESZEROS_RUN_LENGTH 0x050
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#define QPHY_V5_PCS_USB3_ALFPS_DEGLITCH_VAL 0x054
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#define QPHY_V5_PCS_USB3_SIGDET_STARTUP_TIMER_VAL 0x058
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#define QPHY_V5_PCS_USB3_TEST_CONTROL 0x05c
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#define QPHY_V5_PCS_USB3_RXTERMINATION_DLY_SEL 0x060
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#endif
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