Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
20 lines
581 B
C
20 lines
581 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2023, Linaro Limited
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*/
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#ifndef QCOM_PHY_QMP_PCS_V6_20_H_
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#define QCOM_PHY_QMP_PCS_V6_20_H_
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/* Only for QMP V6_20 PHY - USB/PCIe PCS registers */
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#define QPHY_V6_20_PCS_G12S1_TXDEEMPH_M6DB 0x170
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#define QPHY_V6_20_PCS_G3S2_PRE_GAIN 0x178
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#define QPHY_V6_20_PCS_RX_SIGDET_LVL 0x190
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#define QPHY_V6_20_PCS_COM_ELECIDLE_DLY_SEL 0x1b8
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#define QPHY_V6_20_PCS_TX_RX_CONFIG1 0x1dc
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#define QPHY_V6_20_PCS_TX_RX_CONFIG2 0x1e0
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#define QPHY_V6_20_PCS_EQ_CONFIG4 0x1f8
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#define QPHY_V6_20_PCS_EQ_CONFIG5 0x1fc
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#endif
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