Files
cubelinux-kernel/include/dt-bindings/clock/qcom,dispcc-sm6125.h
T
Greg Kroah-Hartman 598cf27219 Linux 6.19.3
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org
Tested-by: Florian Fainelli <florian.fainelli@broadcom.com>
Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com>
Tested-by: Peter Schneider <pschneider1968@googlemail.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Salvatore Bonaccorso <carnil@debian.org>
Tested-by: Brett A C Sheffield <bacs@librecast.net>
Tested-by: Mark Brown <broonie@kernel.org>
Tested-by: Luna Jernberg <droidbittin@gmail.com>
Tested-by: Ronald Warsow <rwarsow@gmx.de>
Tested-by: Justin M. Forbes <jforbes@fedoraproject.org>
Tested-by: Ron Economos <re@w6rz.net>
Tested-by: Miguel Ojeda <ojeda@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-02-19 16:33:27 +01:00

42 lines
1.3 KiB
C

/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
/*
* Copyright (c) 2021, The Linux Foundation. All rights reserved.
*/
#ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6125_H
#define _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6125_H
#define DISP_CC_PLL0 0
#define DISP_CC_MDSS_AHB_CLK 1
#define DISP_CC_MDSS_AHB_CLK_SRC 2
#define DISP_CC_MDSS_BYTE0_CLK 3
#define DISP_CC_MDSS_BYTE0_CLK_SRC 4
#define DISP_CC_MDSS_BYTE0_INTF_CLK 5
#define DISP_CC_MDSS_DP_AUX_CLK 6
#define DISP_CC_MDSS_DP_AUX_CLK_SRC 7
#define DISP_CC_MDSS_DP_CRYPTO_CLK 8
#define DISP_CC_MDSS_DP_CRYPTO_CLK_SRC 9
#define DISP_CC_MDSS_DP_LINK_CLK 10
#define DISP_CC_MDSS_DP_LINK_CLK_SRC 11
#define DISP_CC_MDSS_DP_LINK_INTF_CLK 12
#define DISP_CC_MDSS_DP_PIXEL_CLK 13
#define DISP_CC_MDSS_DP_PIXEL_CLK_SRC 14
#define DISP_CC_MDSS_ESC0_CLK 15
#define DISP_CC_MDSS_ESC0_CLK_SRC 16
#define DISP_CC_MDSS_MDP_CLK 17
#define DISP_CC_MDSS_MDP_CLK_SRC 18
#define DISP_CC_MDSS_MDP_LUT_CLK 19
#define DISP_CC_MDSS_NON_GDSC_AHB_CLK 20
#define DISP_CC_MDSS_PCLK0_CLK 21
#define DISP_CC_MDSS_PCLK0_CLK_SRC 22
#define DISP_CC_MDSS_ROT_CLK 23
#define DISP_CC_MDSS_ROT_CLK_SRC 24
#define DISP_CC_MDSS_VSYNC_CLK 25
#define DISP_CC_MDSS_VSYNC_CLK_SRC 26
#define DISP_CC_XO_CLK 27
/* DISP_CC GDSCR */
#define MDSS_GDSC 0
#endif