Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
36 lines
1.0 KiB
C
36 lines
1.0 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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*
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* Copyright (C) 2025 Renesas Electronics Corp.
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*/
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#ifndef __DT_BINDINGS_CLOCK_RENESAS_R9A09G077_CPG_H__
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#define __DT_BINDINGS_CLOCK_RENESAS_R9A09G077_CPG_H__
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#include <dt-bindings/clock/renesas-cpg-mssr.h>
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/* R9A09G077 CPG Core Clocks */
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#define R9A09G077_CLK_CA55C0 0
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#define R9A09G077_CLK_CA55C1 1
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#define R9A09G077_CLK_CA55C2 2
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#define R9A09G077_CLK_CA55C3 3
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#define R9A09G077_CLK_CA55S 4
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#define R9A09G077_CLK_CR52_CPU0 5
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#define R9A09G077_CLK_CR52_CPU1 6
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#define R9A09G077_CLK_CKIO 7
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#define R9A09G077_CLK_PCLKAH 8
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#define R9A09G077_CLK_PCLKAM 9
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#define R9A09G077_CLK_PCLKAL 10
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#define R9A09G077_CLK_PCLKGPTL 11
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#define R9A09G077_CLK_PCLKH 12
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#define R9A09G077_CLK_PCLKM 13
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#define R9A09G077_CLK_PCLKL 14
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#define R9A09G077_SDHI_CLKHS 15
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#define R9A09G077_USB_CLK 16
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#define R9A09G077_ETCLKA 17
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#define R9A09G077_ETCLKB 18
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#define R9A09G077_ETCLKC 19
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#define R9A09G077_ETCLKD 20
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#define R9A09G077_ETCLKE 21
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#endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G077_CPG_H__ */
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