Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
47 lines
1.7 KiB
C
47 lines
1.7 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
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*/
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#ifndef _DT_BINDINGS_RESET_QCOM_IPQ5424_NSSCC_H
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#define _DT_BINDINGS_RESET_QCOM_IPQ5424_NSSCC_H
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#define NSS_CC_CE_APB_CLK_ARES 0
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#define NSS_CC_CE_AXI_CLK_ARES 1
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#define NSS_CC_DEBUG_CLK_ARES 2
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#define NSS_CC_EIP_CLK_ARES 3
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#define NSS_CC_NSS_CSR_CLK_ARES 4
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#define NSS_CC_NSSNOC_CE_APB_CLK_ARES 5
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#define NSS_CC_NSSNOC_CE_AXI_CLK_ARES 6
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#define NSS_CC_NSSNOC_EIP_CLK_ARES 7
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#define NSS_CC_NSSNOC_NSS_CSR_CLK_ARES 8
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#define NSS_CC_NSSNOC_PPE_CLK_ARES 9
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#define NSS_CC_NSSNOC_PPE_CFG_CLK_ARES 10
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#define NSS_CC_PORT1_MAC_CLK_ARES 11
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#define NSS_CC_PORT1_RX_CLK_ARES 12
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#define NSS_CC_PORT1_TX_CLK_ARES 13
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#define NSS_CC_PORT2_MAC_CLK_ARES 14
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#define NSS_CC_PORT2_RX_CLK_ARES 15
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#define NSS_CC_PORT2_TX_CLK_ARES 16
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#define NSS_CC_PORT3_MAC_CLK_ARES 17
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#define NSS_CC_PORT3_RX_CLK_ARES 18
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#define NSS_CC_PORT3_TX_CLK_ARES 19
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#define NSS_CC_PPE_BCR 20
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#define NSS_CC_PPE_EDMA_CLK_ARES 21
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#define NSS_CC_PPE_EDMA_CFG_CLK_ARES 22
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#define NSS_CC_PPE_SWITCH_BTQ_CLK_ARES 23
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#define NSS_CC_PPE_SWITCH_CLK_ARES 24
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#define NSS_CC_PPE_SWITCH_CFG_CLK_ARES 25
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#define NSS_CC_PPE_SWITCH_IPE_CLK_ARES 26
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#define NSS_CC_UNIPHY_PORT1_RX_CLK_ARES 27
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#define NSS_CC_UNIPHY_PORT1_TX_CLK_ARES 28
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#define NSS_CC_UNIPHY_PORT2_RX_CLK_ARES 29
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#define NSS_CC_UNIPHY_PORT2_TX_CLK_ARES 30
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#define NSS_CC_UNIPHY_PORT3_RX_CLK_ARES 31
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#define NSS_CC_UNIPHY_PORT3_TX_CLK_ARES 32
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#define NSS_CC_XGMAC0_PTP_REF_CLK_ARES 33
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#define NSS_CC_XGMAC1_PTP_REF_CLK_ARES 34
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#define NSS_CC_XGMAC2_PTP_REF_CLK_ARES 35
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#endif
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