Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
68 lines
1.6 KiB
C
68 lines
1.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/* CRC32c (Castagnoli), sparc64 crc32c opcode accelerated
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*
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* This is based largely upon arch/x86/crypto/crc32c-intel.c
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*
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* Copyright (C) 2008 Intel Corporation
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* Authors: Austin Zhang <austin_zhang@linux.intel.com>
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* Kent Liu <kent.liu@intel.com>
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*/
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#include <asm/pstate.h>
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#include <asm/elf.h>
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static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_crc32c_opcode);
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#define crc32_le_arch crc32_le_base /* not implemented on this arch */
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#define crc32_be_arch crc32_be_base /* not implemented on this arch */
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void crc32c_sparc64(u32 *crcp, const u64 *data, size_t len);
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static inline u32 crc32c_arch(u32 crc, const u8 *data, size_t len)
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{
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size_t n = -(uintptr_t)data & 7;
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if (!static_branch_likely(&have_crc32c_opcode))
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return crc32c_base(crc, data, len);
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if (n) {
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/* Data isn't 8-byte aligned. Align it. */
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n = min(n, len);
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crc = crc32c_base(crc, data, n);
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data += n;
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len -= n;
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}
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n = len & ~7U;
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if (n) {
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crc32c_sparc64(&crc, (const u64 *)data, n);
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data += n;
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len -= n;
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}
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if (len)
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crc = crc32c_base(crc, data, len);
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return crc;
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}
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#define crc32_mod_init_arch crc32_mod_init_arch
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static void crc32_mod_init_arch(void)
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{
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unsigned long cfr;
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if (!(sparc64_elf_hwcap & HWCAP_SPARC_CRYPTO))
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return;
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__asm__ __volatile__("rd %%asr26, %0" : "=r" (cfr));
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if (!(cfr & CFR_CRC32C))
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return;
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static_branch_enable(&have_crc32c_opcode);
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pr_info("Using sparc64 crc32c opcode optimized CRC32C implementation\n");
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}
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static inline u32 crc32_optimizations_arch(void)
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{
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if (static_key_enabled(&have_crc32c_opcode))
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return CRC32C_OPTIMIZATION;
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return 0;
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}
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