Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
41 lines
935 B
YAML
41 lines
935 B
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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# Copyright 2020 thingy.jp.
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/arm/mstar/mstar,smpctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: MStar/SigmaStar Armv7 SoC SMP control registers
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maintainers:
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- Daniel Palmer <daniel@thingy.jp>
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description: |
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MStar/SigmaStar's Armv7 SoCs that have more than one processor
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have a region of registers that allow setting the boot address
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and a magic number that allows secondary processors to leave
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the loop they are parked in by the boot ROM.
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properties:
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compatible:
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items:
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- enum:
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- sstar,ssd201-smpctrl # SSD201/SSD202D
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- const: mstar,smpctrl
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reg:
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maxItems: 1
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required:
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- compatible
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- reg
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additionalProperties: false
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examples:
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- |
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smpctrl@204000 {
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compatible = "sstar,ssd201-smpctrl", "mstar,smpctrl";
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reg = <0x204000 0x200>;
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};
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