Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
71 lines
1.7 KiB
YAML
71 lines
1.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright 2020 Arm Ltd.
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/perf/arm,cmn.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Arm CMN (Coherent Mesh Network) Performance Monitors
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maintainers:
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- Robin Murphy <robin.murphy@arm.com>
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properties:
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compatible:
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enum:
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- arm,cmn-600
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- arm,cmn-650
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- arm,cmn-700
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- arm,cmn-s3
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- arm,ci-700
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reg:
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items:
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- description: Physical address of the base (PERIPHBASE) and
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size of the configuration address space.
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interrupts:
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minItems: 1
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items:
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- description: Overflow interrupt for DTC0
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- description: Overflow interrupt for DTC1
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- description: Overflow interrupt for DTC2
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- description: Overflow interrupt for DTC3
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description: One interrupt for each DTC domain implemented must
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be specified, in order. DTC0 is always present.
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arm,root-node:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: Offset from PERIPHBASE of CMN-600's configuration
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discovery node (see TRM definition of ROOTNODEBASE). Not
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relevant for newer CMN/CI products.
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required:
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- compatible
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- reg
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- interrupts
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if:
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properties:
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compatible:
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contains:
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const: arm,cmn-600
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then:
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required:
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- arm,root-node
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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pmu@50000000 {
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compatible = "arm,cmn-600";
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reg = <0x50000000 0x4000000>;
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/* 4x2 mesh with one DTC, and CFG node at 0,1,1,0 */
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interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
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arm,root-node = <0x104000>;
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};
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...
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