Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
72 lines
1.4 KiB
YAML
72 lines
1.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/starfive,jh7110-dphy-rx.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: StarFive SoC JH7110 MIPI D-PHY Rx Controller
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maintainers:
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- Jack Zhu <jack.zhu@starfivetech.com>
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- Changhuang Liang <changhuang.liang@starfivetech.com>
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description:
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StarFive SoCs contain a MIPI CSI D-PHY based on M31 IP, used to
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transfer CSI camera data.
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properties:
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compatible:
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const: starfive,jh7110-dphy-rx
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reg:
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maxItems: 1
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clocks:
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items:
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- description: config clock
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- description: reference clock
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- description: escape mode transmit clock
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clock-names:
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items:
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- const: cfg
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- const: ref
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- const: tx
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resets:
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items:
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- description: DPHY_HW reset
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- description: DPHY_B09_ALWAYS_ON reset
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power-domains:
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maxItems: 1
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"#phy-cells":
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const: 0
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- resets
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- power-domains
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- "#phy-cells"
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additionalProperties: false
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examples:
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- |
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phy@19820000 {
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compatible = "starfive,jh7110-dphy-rx";
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reg = <0x19820000 0x10000>;
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clocks = <&ispcrg 3>,
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<&ispcrg 4>,
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<&ispcrg 5>;
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clock-names = "cfg", "ref", "tx";
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resets = <&ispcrg 2>,
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<&ispcrg 3>;
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power-domains = <&aon_syscon 1>;
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#phy-cells = <0>;
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};
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