Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
43 lines
1.2 KiB
YAML
43 lines
1.2 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spi/cdns,qspi-nor-peripheral-props.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Peripheral-specific properties for the Cadence QSPI controller.
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description:
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See spi-peripheral-props.yaml for more info.
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maintainers:
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- Vaishnav Achath <vaishnav.a@ti.com>
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properties:
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# cdns,qspi-nor.yaml
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cdns,read-delay:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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Delay for read capture logic, in clock cycles.
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cdns,tshsl-ns:
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description:
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Delay in nanoseconds for the length that the master mode chip select
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outputs are de-asserted between transactions.
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cdns,tsd2d-ns:
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description:
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Delay in nanoseconds between one chip select being de-activated
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and the activation of another.
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cdns,tchsh-ns:
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description:
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Delay in nanoseconds between last bit of current transaction and
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deasserting the device chip select (qspi_n_ss_out).
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cdns,tslch-ns:
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description:
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Delay in nanoseconds between setting qspi_n_ss_out low and
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first bit transfer.
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additionalProperties: true
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