Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
37 lines
1.1 KiB
C
37 lines
1.1 KiB
C
/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
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/*
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* Axis ARTPEC-8 SoC device tree pinctrl constants
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*
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* Copyright (c) 2025 Samsung Electronics Co., Ltd.
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* https://www.samsung.com
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* Copyright (c) 2025 Axis Communications AB.
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* https://www.axis.com
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*/
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#ifndef __DTS_ARM64_SAMSUNG_EXYNOS_AXIS_ARTPEC_PINCTRL_H__
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#define __DTS_ARM64_SAMSUNG_EXYNOS_AXIS_ARTPEC_PINCTRL_H__
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#define ARTPEC_PIN_PULL_NONE 0
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#define ARTPEC_PIN_PULL_DOWN 1
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#define ARTPEC_PIN_PULL_UP 3
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#define ARTPEC_PIN_FUNC_INPUT 0
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#define ARTPEC_PIN_FUNC_OUTPUT 1
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#define ARTPEC_PIN_FUNC_2 2
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#define ARTPEC_PIN_FUNC_3 3
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#define ARTPEC_PIN_FUNC_4 4
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#define ARTPEC_PIN_FUNC_5 5
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#define ARTPEC_PIN_FUNC_6 6
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#define ARTPEC_PIN_FUNC_EINT 0xf
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#define ARTPEC_PIN_FUNC_F ARTPEC_PIN_FUNC_EINT
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/* Drive strength for ARTPEC */
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#define ARTPEC_PIN_DRV_SR1 0x8
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#define ARTPEC_PIN_DRV_SR2 0x9
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#define ARTPEC_PIN_DRV_SR3 0xa
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#define ARTPEC_PIN_DRV_SR4 0xb
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#define ARTPEC_PIN_DRV_SR5 0xc
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#define ARTPEC_PIN_DRV_SR6 0xd
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#endif /* __DTS_ARM64_SAMSUNG_EXYNOS_AXIS_ARTPEC_PINCTRL_H__ */
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