Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
34 lines
870 B
C
34 lines
870 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Pinctrl binding constants for GS101
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*
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* Copyright 2020-2023 Google LLC
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*/
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#ifndef __DTS_ARM64_SAMSUNG_EXYNOS_GOOGLE_PINCTRL_GS101_H__
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#define __DTS_ARM64_SAMSUNG_EXYNOS_GOOGLE_PINCTRL_GS101_H__
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#define GS101_PIN_PULL_NONE 0
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#define GS101_PIN_PULL_DOWN 1
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#define GS101_PIN_PULL_UP 3
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/* Pin function in power down mode */
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#define GS101_PIN_PDN_OUT0 0
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#define GS101_PIN_PDN_OUT1 1
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#define GS101_PIN_PDN_INPUT 2
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#define GS101_PIN_PDN_PREV 3
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/* GS101 drive strengths */
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#define GS101_PIN_DRV_2_5_MA 0
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#define GS101_PIN_DRV_5_MA 1
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#define GS101_PIN_DRV_7_5_MA 2
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#define GS101_PIN_DRV_10_MA 3
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#define GS101_PIN_FUNC_INPUT 0
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#define GS101_PIN_FUNC_OUTPUT 1
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#define GS101_PIN_FUNC_2 2
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#define GS101_PIN_FUNC_3 3
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#define GS101_PIN_FUNC_EINT 0xf
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#endif /* __DTS_ARM64_SAMSUNG_EXYNOS_GOOGLE_PINCTRL_GS101_H__ */
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