Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
28 lines
681 B
Devicetree
28 lines
681 B
Devicetree
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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/*
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* Device Tree Source for the RZ/Five SMARC EVK
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*
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* Copyright (C) 2022 Renesas Electronics Corp.
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*/
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/dts-v1/;
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/*
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* DIP-Switch SW1 setting
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* 1 : High; 0: Low
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* SW1-2 : SW_SD0_DEV_SEL (0: uSD; 1: eMMC)
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* SW1-3 : SW_ET0_EN_N (0: ETHER0; 1: CAN0, CAN1, SSI1, RSPI1)
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* Please change below macros according to SW1 setting on the SoM
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*/
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#define SW_SW0_DEV_SEL 1
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#define SW_ET0_EN_N 1
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#include "r9a07g043f.dtsi"
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#include "rzfive-smarc-som.dtsi"
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#include "rzfive-smarc.dtsi"
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/ {
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model = "Renesas SMARC EVK based on r9a07g043f01";
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compatible = "renesas,smarc-evk", "renesas,r9a07g043f01", "renesas,r9a07g043";
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};
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