Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
93 lines
2.1 KiB
C
93 lines
2.1 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2013-2021 Intel Corporation
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*
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* LPT/WPT IOSF sideband.
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*/
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#include <drm/drm_print.h>
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#include "intel_de.h"
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#include "intel_display_core.h"
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#include "intel_sbi.h"
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#include "intel_sbi_regs.h"
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/* SBI access */
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static int intel_sbi_rw(struct intel_display *display, u16 reg,
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enum intel_sbi_destination destination,
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u32 *val, bool is_read)
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{
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u32 cmd;
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lockdep_assert_held(&display->sbi.lock);
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if (intel_de_wait_fw_ms(display, SBI_CTL_STAT,
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SBI_STATUS_MASK, SBI_STATUS_READY, 100, NULL)) {
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drm_err(display->drm, "timeout waiting for SBI to become ready\n");
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return -EBUSY;
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}
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intel_de_write_fw(display, SBI_ADDR, SBI_ADDR_VALUE(reg));
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intel_de_write_fw(display, SBI_DATA, is_read ? 0 : *val);
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if (destination == SBI_ICLK)
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cmd = SBI_CTL_DEST_ICLK | SBI_CTL_OP_CRRD;
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else
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cmd = SBI_CTL_DEST_MPHY | SBI_CTL_OP_IORD;
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if (!is_read)
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cmd |= SBI_CTL_OP_WR;
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intel_de_write_fw(display, SBI_CTL_STAT, cmd | SBI_STATUS_BUSY);
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if (intel_de_wait_fw_ms(display, SBI_CTL_STAT,
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SBI_STATUS_MASK, SBI_STATUS_READY, 100, &cmd)) {
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drm_err(display->drm, "timeout waiting for SBI to complete read\n");
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return -ETIMEDOUT;
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}
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if (cmd & SBI_RESPONSE_FAIL) {
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drm_err(display->drm, "error during SBI read of reg %x\n", reg);
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return -ENXIO;
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}
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if (is_read)
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*val = intel_de_read_fw(display, SBI_DATA);
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return 0;
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}
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void intel_sbi_lock(struct intel_display *display)
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{
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mutex_lock(&display->sbi.lock);
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}
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void intel_sbi_unlock(struct intel_display *display)
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{
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mutex_unlock(&display->sbi.lock);
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}
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u32 intel_sbi_read(struct intel_display *display, u16 reg,
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enum intel_sbi_destination destination)
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{
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u32 result = 0;
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intel_sbi_rw(display, reg, destination, &result, true);
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return result;
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}
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void intel_sbi_write(struct intel_display *display, u16 reg, u32 value,
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enum intel_sbi_destination destination)
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{
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intel_sbi_rw(display, reg, destination, &value, false);
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}
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void intel_sbi_init(struct intel_display *display)
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{
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mutex_init(&display->sbi.lock);
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}
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void intel_sbi_fini(struct intel_display *display)
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{
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mutex_destroy(&display->sbi.lock);
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}
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