Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
19 lines
665 B
C
19 lines
665 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __COM9026_H
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#define __COM9026_H
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/* COM 9026 controller chip --> ARCnet register addresses */
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#define COM9026_REG_W_INTMASK 0 /* writable */
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#define COM9026_REG_R_STATUS 0 /* readable */
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#define COM9026_REG_W_COMMAND 1 /* writable, returns random vals on read (?) */
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#define COM9026_REG_RW_CONFIG 2 /* Configuration register */
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#define COM9026_REG_R_RESET 8 /* software reset (on read) */
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#define COM9026_REG_RW_MEMDATA 12 /* Data port for IO-mapped memory */
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#define COM9026_REG_W_ADDR_LO 14 /* Control registers for said */
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#define COM9026_REG_W_ADDR_HI 15
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#define COM9026_REG_R_STATION 1 /* Station ID */
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#endif
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