Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
45 lines
1.3 KiB
C
45 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0+
|
|
*
|
|
* Copyright (C) 2016 Renesas Electronics Corp.
|
|
* Copyright (C) 2017 Cogent Embedded, Inc.
|
|
*/
|
|
#ifndef __DT_BINDINGS_CLOCK_R8A77970_CPG_MSSR_H__
|
|
#define __DT_BINDINGS_CLOCK_R8A77970_CPG_MSSR_H__
|
|
|
|
#include <dt-bindings/clock/renesas-cpg-mssr.h>
|
|
|
|
/* r8a77970 CPG Core Clocks */
|
|
#define R8A77970_CLK_Z2 0
|
|
#define R8A77970_CLK_ZR 1
|
|
#define R8A77970_CLK_ZTR 2
|
|
#define R8A77970_CLK_ZTRD2 3
|
|
#define R8A77970_CLK_ZT 4
|
|
#define R8A77970_CLK_ZX 5
|
|
#define R8A77970_CLK_S1D1 6
|
|
#define R8A77970_CLK_S1D2 7
|
|
#define R8A77970_CLK_S1D4 8
|
|
#define R8A77970_CLK_S2D1 9
|
|
#define R8A77970_CLK_S2D2 10
|
|
#define R8A77970_CLK_S2D4 11
|
|
#define R8A77970_CLK_LB 12
|
|
#define R8A77970_CLK_CL 13
|
|
#define R8A77970_CLK_ZB3 14
|
|
#define R8A77970_CLK_ZB3D2 15
|
|
#define R8A77970_CLK_DDR 16
|
|
#define R8A77970_CLK_CR 17
|
|
#define R8A77970_CLK_CRD2 18
|
|
#define R8A77970_CLK_SD0H 19
|
|
#define R8A77970_CLK_SD0 20
|
|
#define R8A77970_CLK_RPC 21
|
|
#define R8A77970_CLK_RPCD2 22
|
|
#define R8A77970_CLK_MSO 23
|
|
#define R8A77970_CLK_CANFD 24
|
|
#define R8A77970_CLK_CSI0 25
|
|
#define R8A77970_CLK_FRAY 26
|
|
#define R8A77970_CLK_CP 27
|
|
#define R8A77970_CLK_CPEX 28
|
|
#define R8A77970_CLK_R 29
|
|
#define R8A77970_CLK_OSC 30
|
|
|
|
#endif /* __DT_BINDINGS_CLOCK_R8A77970_CPG_MSSR_H__ */
|