Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
64 lines
1.3 KiB
C
64 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* stm32fx-clock.h
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*
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* Copyright (C) 2016 STMicroelectronics
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* Author: Gabriel Fernandez for STMicroelectronics.
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*/
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/*
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* List of clocks which are not derived from system clock (SYSCLOCK)
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*
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* The index of these clocks is the secondary index of DT bindings
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* (see Documentation/devicetree/bindings/clock/st,stm32-rcc.yaml)
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*
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* e.g:
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<assigned-clocks = <&rcc 1 CLK_LSE>;
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*/
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#ifndef _DT_BINDINGS_CLK_STMFX_H
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#define _DT_BINDINGS_CLK_STMFX_H
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#define SYSTICK 0
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#define FCLK 1
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#define CLK_LSI 2
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#define CLK_LSE 3
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#define CLK_HSE_RTC 4
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#define CLK_RTC 5
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#define PLL_VCO_I2S 6
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#define PLL_VCO_SAI 7
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#define CLK_LCD 8
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#define CLK_I2S 9
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#define CLK_SAI1 10
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#define CLK_SAI2 11
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#define CLK_I2SQ_PDIV 12
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#define CLK_SAIQ_PDIV 13
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#define CLK_HSI 14
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#define CLK_SYSCLK 15
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#define CLK_F469_DSI 16
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#define END_PRIMARY_CLK 17
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#define CLK_HDMI_CEC 16
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#define CLK_SPDIF 17
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#define CLK_USART1 18
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#define CLK_USART2 19
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#define CLK_USART3 20
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#define CLK_UART4 21
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#define CLK_UART5 22
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#define CLK_USART6 23
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#define CLK_UART7 24
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#define CLK_UART8 25
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#define CLK_I2C1 26
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#define CLK_I2C2 27
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#define CLK_I2C3 28
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#define CLK_I2C4 29
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#define CLK_LPTIMER 30
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#define CLK_PLL_SRC 31
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#define CLK_DFSDM1 32
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#define CLK_ADFSDM1 33
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#define CLK_F769_DSI 34
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#define END_PRIMARY_CLK_F7 35
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#endif
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