Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
15 lines
532 B
C
15 lines
532 B
C
/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
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#ifndef __DT_BINDINGS_DMA_DW_DMAC_H__
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#define __DT_BINDINGS_DMA_DW_DMAC_H__
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/*
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* Protection Control bits provide protection against illegal transactions.
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* The protection bits[0:2] are one-to-one mapped to AHB HPROT[3:1] signals.
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*/
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#define DW_DMAC_HPROT1_PRIVILEGED_MODE (1 << 0) /* Privileged Mode */
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#define DW_DMAC_HPROT2_BUFFERABLE (1 << 1) /* DMA is bufferable */
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#define DW_DMAC_HPROT3_CACHEABLE (1 << 2) /* DMA is cacheable */
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#endif /* __DT_BINDINGS_DMA_DW_DMAC_H__ */
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