Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
18 lines
426 B
C
18 lines
426 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* MIO pin configuration defines for Xilinx Zynq
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*
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* Copyright (C) 2021 Xilinx, Inc.
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*/
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#ifndef _DT_BINDINGS_PINCTRL_ZYNQ_H
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#define _DT_BINDINGS_PINCTRL_ZYNQ_H
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/* Configuration options for different power supplies */
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#define IO_STANDARD_LVCMOS18 1
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#define IO_STANDARD_LVCMOS25 2
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#define IO_STANDARD_LVCMOS33 3
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#define IO_STANDARD_HSTL 4
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#endif /* _DT_BINDINGS_PINCTRL_ZYNQ_H */
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