Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
46 lines
1.1 KiB
C
46 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* wm9713.h -- WM9713 Soc Audio driver
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*/
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#ifndef _WM9713_H
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#define _WM9713_H
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/* clock inputs */
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#define WM9713_CLKA_PIN 0
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#define WM9713_CLKB_PIN 1
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/* clock divider ID's */
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#define WM9713_PCMCLK_DIV 0
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#define WM9713_CLKA_MULT 1
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#define WM9713_CLKB_MULT 2
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#define WM9713_HIFI_DIV 3
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#define WM9713_PCMBCLK_DIV 4
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#define WM9713_PCMCLK_PLL_DIV 5
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#define WM9713_HIFI_PLL_DIV 6
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/* Calculate the appropriate bit mask for the external PCM clock divider */
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#define WM9713_PCMDIV(x) ((x - 1) << 8)
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/* Calculate the appropriate bit mask for the external HiFi clock divider */
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#define WM9713_HIFIDIV(x) ((x - 1) << 12)
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/* MCLK clock mulitipliers */
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#define WM9713_CLKA_X1 (0 << 1)
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#define WM9713_CLKA_X2 (1 << 1)
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#define WM9713_CLKB_X1 (0 << 2)
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#define WM9713_CLKB_X2 (1 << 2)
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/* MCLK clock MUX */
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#define WM9713_CLK_MUX_A (0 << 0)
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#define WM9713_CLK_MUX_B (1 << 0)
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/* Voice DAI BCLK divider */
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#define WM9713_PCMBCLK_DIV_1 (0 << 9)
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#define WM9713_PCMBCLK_DIV_2 (1 << 9)
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#define WM9713_PCMBCLK_DIV_4 (2 << 9)
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#define WM9713_PCMBCLK_DIV_8 (3 << 9)
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#define WM9713_PCMBCLK_DIV_16 (4 << 9)
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#endif
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