Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
56 lines
1.1 KiB
YAML
56 lines
1.1 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,ipq5424-apss-clk.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm APSS IPQ5424 Clock Controller
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maintainers:
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- Varadarajan Narayanan <quic_varada@quicinc.com>
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description:
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The CPU core in ipq5424 is clocked by a huayra PLL with RCG support.
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The RCG and PLL have a separate register space from the GCC.
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properties:
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compatible:
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enum:
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- qcom,ipq5424-apss-clk
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reg:
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maxItems: 1
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clocks:
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items:
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- description: Reference to the XO clock.
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- description: Reference to the GPLL0 clock.
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'#clock-cells':
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const: 1
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'#interconnect-cells':
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const: 1
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required:
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- compatible
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- reg
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- clocks
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- '#clock-cells'
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- '#interconnect-cells'
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,ipq5424-gcc.h>
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apss_clk: clock-controller@fa80000 {
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compatible = "qcom,ipq5424-apss-clk";
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reg = <0x0fa80000 0x20000>;
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clocks = <&xo_board>,
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<&gcc GPLL0>;
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#clock-cells = <1>;
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#interconnect-cells = <1>;
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};
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