Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
83 lines
2.2 KiB
YAML
83 lines
2.2 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/clock/qcom,sc7280-dispcc.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Qualcomm Display Clock & Reset Controller on SC7280
|
|
|
|
maintainers:
|
|
- Taniya Das <quic_tdas@quicinc.com>
|
|
|
|
description: |
|
|
Qualcomm display clock control module provides the clocks, resets and power
|
|
domains on SC7280.
|
|
|
|
See also: include/dt-bindings/clock/qcom,dispcc-sc7280.h
|
|
|
|
properties:
|
|
compatible:
|
|
const: qcom,sc7280-dispcc
|
|
|
|
clocks:
|
|
items:
|
|
- description: Board XO source
|
|
- description: GPLL0 source from GCC
|
|
- description: Byte clock from DSI PHY
|
|
- description: Pixel clock from DSI PHY
|
|
- description: Link clock from DP PHY
|
|
- description: VCO DIV clock from DP PHY
|
|
- description: Link clock from EDP PHY
|
|
- description: VCO DIV clock from EDP PHY
|
|
|
|
clock-names:
|
|
items:
|
|
- const: bi_tcxo
|
|
- const: gcc_disp_gpll0_clk
|
|
- const: dsi0_phy_pll_out_byteclk
|
|
- const: dsi0_phy_pll_out_dsiclk
|
|
- const: dp_phy_pll_link_clk
|
|
- const: dp_phy_pll_vco_div_clk
|
|
- const: edp_phy_pll_link_clk
|
|
- const: edp_phy_pll_vco_div_clk
|
|
|
|
required:
|
|
- compatible
|
|
- clocks
|
|
- clock-names
|
|
- '#power-domain-cells'
|
|
|
|
allOf:
|
|
- $ref: qcom,gcc.yaml#
|
|
|
|
unevaluatedProperties: false
|
|
|
|
examples:
|
|
- |
|
|
#include <dt-bindings/clock/qcom,gcc-sc7280.h>
|
|
#include <dt-bindings/clock/qcom,rpmh.h>
|
|
clock-controller@af00000 {
|
|
compatible = "qcom,sc7280-dispcc";
|
|
reg = <0x0af00000 0x200000>;
|
|
clocks = <&rpmhcc RPMH_CXO_CLK>,
|
|
<&gcc GCC_DISP_GPLL0_CLK_SRC>,
|
|
<&dsi_phy 0>,
|
|
<&dsi_phy 1>,
|
|
<&dp_phy 0>,
|
|
<&dp_phy 1>,
|
|
<&edp_phy 0>,
|
|
<&edp_phy 1>;
|
|
clock-names = "bi_tcxo",
|
|
"gcc_disp_gpll0_clk",
|
|
"dsi0_phy_pll_out_byteclk",
|
|
"dsi0_phy_pll_out_dsiclk",
|
|
"dp_phy_pll_link_clk",
|
|
"dp_phy_pll_vco_div_clk",
|
|
"edp_phy_pll_link_clk",
|
|
"edp_phy_pll_vco_div_clk";
|
|
#clock-cells = <1>;
|
|
#reset-cells = <1>;
|
|
#power-domain-cells = <1>;
|
|
};
|
|
...
|