Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
33 lines
778 B
Plaintext
33 lines
778 B
Plaintext
Binding for a ST multiplexed clock driver.
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This binding supports only simple indexed multiplexers, it does not
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support table based parent index to hardware value translations.
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This binding uses the common clock binding[1].
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[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
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Required properties:
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- compatible : shall be:
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"st,stih407-clkgen-a9-mux"
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- #clock-cells : from common clock binding; shall be set to 0.
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- reg : A Base address and length of the register set.
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- clocks : from common clock binding
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Example:
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clk_m_a9: clk-m-a9@92b0000 {
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#clock-cells = <0>;
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compatible = "st,stih407-clkgen-a9-mux";
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reg = <0x92b0000 0x10000>;
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clocks = <&clockgen_a9_pll 0>,
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<&clockgen_a9_pll 0>,
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<&clk_s_c0_flexgen 13>,
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<&clk_m_a9_ext2f_div2>;
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};
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