Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
20 lines
629 B
Plaintext
20 lines
629 B
Plaintext
Altera SOCFPGA Arria10 FPGA Manager
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Required properties:
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- compatible : should contain "altr,socfpga-a10-fpga-mgr"
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- reg : base address and size for memory mapped io.
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- The first index is for FPGA manager register access.
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- The second index is for writing FPGA configuration data.
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- resets : Phandle and reset specifier for the device's reset.
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- clocks : Clocks used by the device.
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Example:
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fpga_mgr: fpga-mgr@ffd03000 {
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compatible = "altr,socfpga-a10-fpga-mgr";
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reg = <0xffd03000 0x100
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0xffcfe400 0x20>;
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clocks = <&l4_mp_clk>;
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resets = <&rst FPGAMGR_RESET>;
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};
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