Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
54 lines
1.4 KiB
Plaintext
54 lines
1.4 KiB
Plaintext
* Texas Instruments TV7002 video decoder
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The TVP7002 device supports digitizing of video and graphics signal in RGB and
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YPbPr color space.
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Required Properties :
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- compatible : Must be "ti,tvp7002"
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Optional Properties:
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- hsync-active: HSYNC Polarity configuration for the bus. Default value when
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this property is not specified is <0>.
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- vsync-active: VSYNC Polarity configuration for the bus. Default value when
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this property is not specified is <0>.
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- pclk-sample: Clock polarity of the bus. Default value when this property is
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not specified is <0>.
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- sync-on-green-active: Active state of Sync-on-green signal property of the
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endpoint.
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0 = Normal Operation (Active Low, Default)
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1 = Inverted operation
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- field-even-active: Active-high Field ID output polarity control of the bus.
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Under normal operation, the field ID output is set to logic 1 for an odd field
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(field 1) and set to logic 0 for an even field (field 0).
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0 = Normal Operation (Active Low, Default)
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1 = FID output polarity inverted
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For further reading of port node refer Documentation/devicetree/bindings/media/
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video-interfaces.txt.
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Example:
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i2c0@1c22000 {
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...
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...
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tvp7002@5c {
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compatible = "ti,tvp7002";
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reg = <0x5c>;
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port {
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tvp7002_1: endpoint {
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hsync-active = <1>;
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vsync-active = <1>;
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pclk-sample = <0>;
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sync-on-green-active = <1>;
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field-even-active = <0>;
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};
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};
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};
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...
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};
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