Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
38 lines
823 B
YAML
38 lines
823 B
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/memory-controllers/xlnx,zynq-ddrc-a05.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Zynq A05 DDR Memory Controller
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maintainers:
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- Krzysztof Kozlowski <krzk@kernel.org>
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- Michal Simek <michal.simek@amd.com>
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description:
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The Zynq DDR ECC controller has an optional ECC support in half-bus width
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(16-bit) configuration. It is capable of correcting single bit ECC errors
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and detecting double bit ECC errors.
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properties:
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compatible:
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const: xlnx,zynq-ddrc-a05
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reg:
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maxItems: 1
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required:
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- compatible
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- reg
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additionalProperties: false
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examples:
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- |
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memory-controller@f8006000 {
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compatible = "xlnx,zynq-ddrc-a05";
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reg = <0xf8006000 0x1000>;
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};
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...
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