Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
46 lines
1.2 KiB
YAML
46 lines
1.2 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/memory-controllers/xlnx,zynqmp-ocmc-1.0.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Xilinx Zynqmp OCM(On-Chip Memory) Controller
|
|
|
|
maintainers:
|
|
- Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
|
|
- Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
|
|
|
|
description: |
|
|
The OCM supports 64-bit wide ECC functionality to detect multi-bit errors
|
|
and recover from a single-bit memory fault.On a write, if all bytes are
|
|
being written, the ECC is generated and written into the ECC RAM along with
|
|
the write-data that is written into the data RAM. If one or more bytes are
|
|
not written, then the read operation results in an correctable error or
|
|
uncorrectable error.
|
|
|
|
properties:
|
|
compatible:
|
|
const: xlnx,zynqmp-ocmc-1.0
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
interrupts:
|
|
maxItems: 1
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- interrupts
|
|
|
|
additionalProperties: false
|
|
|
|
examples:
|
|
- |
|
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
|
memory-controller@ff960000 {
|
|
compatible = "xlnx,zynqmp-ocmc-1.0";
|
|
reg = <0xff960000 0x1000>;
|
|
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|