Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
28 lines
791 B
Plaintext
28 lines
791 B
Plaintext
* Central Interrupt Unit v3
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Properties:
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- compatible: "cavium,octeon-7890-ciu3"
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Compatibility with 78XX and 73XX SOCs.
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- interrupt-controller: This is an interrupt controller.
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- reg: The base address of the CIU's register bank.
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- #interrupt-cells: Must be <2>. The first cell is source number.
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The second cell indicates the triggering semantics, and may have a
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value of either 4 for level semantics, or 1 for edge semantics.
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Example:
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interrupt-controller@1010000000000 {
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compatible = "cavium,octeon-7890-ciu3";
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interrupt-controller;
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/* Interrupts are specified by two parts:
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* 1) Source number (20 significant bits)
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* 2) Trigger type: (4 == level, 1 == edge)
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*/
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#address-cells = <0>;
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#interrupt-cells = <2>;
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reg = <0x10100 0x00000000 0x0 0xb0000000>;
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};
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