Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
22 lines
551 B
Plaintext
22 lines
551 B
Plaintext
* DMA Engine.
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The Octeon DMA Engine transfers between the Boot Bus and main memory.
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The DMA Engine will be referred to by phandle by any device that is
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connected to it.
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Properties:
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- compatible: "cavium,octeon-5750-bootbus-dma"
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Compatibility with all cn52XX, cn56XX and cn6XXX SOCs.
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- reg: The base address of the DMA Engine's register bank.
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- interrupts: A single interrupt specifier.
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Example:
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dma0: dma-engine@1180000000100 {
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compatible = "cavium,octeon-5750-bootbus-dma";
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reg = <0x11800 0x00000100 0x0 0x8>;
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interrupts = <0 63>;
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};
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