Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
81 lines
1.8 KiB
YAML
81 lines
1.8 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/amlogic,g12a-mdio-mux.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: MDIO bus multiplexer/glue of Amlogic G12a SoC family
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description:
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This is a special case of a MDIO bus multiplexer. It allows to choose between
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the internal mdio bus leading to the embedded 10/100 PHY or the external
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MDIO bus.
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maintainers:
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- Neil Armstrong <neil.armstrong@linaro.org>
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allOf:
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- $ref: mdio-mux.yaml#
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properties:
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compatible:
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const: amlogic,g12a-mdio-mux
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reg:
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maxItems: 1
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clocks:
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items:
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- description: peripheral clock
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- description: platform crytal
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- description: SoC 50MHz MPLL
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clock-names:
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items:
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- const: pclk
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- const: clkin0
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- const: clkin1
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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mdio-multiplexer@4c000 {
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compatible = "amlogic,g12a-mdio-mux";
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reg = <0x4c000 0xa4>;
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clocks = <&clkc_eth_phy>, <&xtal>, <&clkc_mpll>;
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clock-names = "pclk", "clkin0", "clkin1";
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mdio-parent-bus = <&mdio0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mdio@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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mdio@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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ethernet-phy@8 {
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compatible = "ethernet-phy-id0180.3301",
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"ethernet-phy-ieee802.3-c22";
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interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
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reg = <8>;
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max-speed = <100>;
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};
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};
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};
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...
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