Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
39 lines
1.0 KiB
Plaintext
39 lines
1.0 KiB
Plaintext
* Marvell PXA168 Ethernet Controller
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Required properties:
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- compatible: should be "marvell,pxa168-eth".
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- reg: address and length of the register set for the device.
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- interrupts: interrupt for the device.
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- clocks: pointer to the clock for the device.
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Optional properties:
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- port-id: Ethernet port number. Should be '0','1' or '2'.
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- #address-cells: must be 1 when using sub-nodes.
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- #size-cells: must be 0 when using sub-nodes.
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- phy-handle: see ethernet.txt file in the same directory.
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The MAC address will be determined using the optional properties
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defined in ethernet.txt.
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Sub-nodes:
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Each PHY can be represented as a sub-node. This is not mandatory.
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Sub-nodes required properties:
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- reg: the MDIO address of the PHY.
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Example:
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eth0: ethernet@f7b90000 {
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compatible = "marvell,pxa168-eth";
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reg = <0xf7b90000 0x10000>;
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clocks = <&chip CLKID_GETH0>;
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interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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phy-handle = <ðphy0>;
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ethphy0: ethernet-phy@0 {
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reg = <0>;
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};
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};
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