Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
62 lines
1.2 KiB
YAML
62 lines
1.2 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/smsc,lan91c111.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Smart Mixed-Signal Connectivity (SMSC) LAN91C9x/91C1xx Controller
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maintainers:
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- Nicolas Pitre <nico@fluxnic.net>
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allOf:
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- $ref: ethernet-controller.yaml#
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properties:
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compatible:
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const: smsc,lan91c111
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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reg-shift: true
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reg-io-width:
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enum: [ 1, 2, 4 ]
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default: 4
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reset-gpios:
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description: GPIO connected to control RESET pin
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maxItems: 1
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power-gpios:
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description: GPIO connect to control PWRDWN pin
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maxItems: 1
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pxa-u16-align4:
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description: put in place the workaround the force all u16 writes to be
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32 bits aligned
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type: boolean
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required:
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- compatible
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- reg
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- interrupts
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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ethernet@4010000 {
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compatible = "smsc,lan91c111";
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reg = <0x40100000 0x10000>;
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phy-mode = "mii";
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interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
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reg-io-width = <2>;
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};
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