Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
80 lines
1.7 KiB
YAML
80 lines
1.7 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/npu/arm,ethos.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Arm Ethos U65/U85
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maintainers:
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- Rob Herring <robh@kernel.org>
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description: >
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The Arm Ethos-U NPUs are designed for IoT inference applications. The NPUs
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can accelerate 8-bit and 16-bit integer quantized networks:
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Transformer networks (U85 only)
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Convolutional Neural Networks (CNN)
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Recurrent Neural Networks (RNN)
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Further documentation is available here:
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U65 TRM: https://developer.arm.com/documentation/102023/
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U85 TRM: https://developer.arm.com/documentation/102685/
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- fsl,imx93-npu
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- const: arm,ethos-u65
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- items:
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- {}
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- const: arm,ethos-u85
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 2
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clock-names:
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items:
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- const: core
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- const: apb
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power-domains:
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maxItems: 1
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sram:
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maxItems: 1
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/imx93-clock.h>
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npu@4a900000 {
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compatible = "fsl,imx93-npu", "arm,ethos-u65";
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reg = <0x4a900000 0x1000>;
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interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&mlmix>;
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clocks = <&clk IMX93_CLK_ML>, <&clk IMX93_CLK_ML_APB>;
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clock-names = "core", "apb";
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sram = <&sram>;
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};
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...
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