Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
65 lines
1.3 KiB
YAML
65 lines
1.3 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pci/sophgo,sg2042-pcie-host.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Sophgo SG2042 PCIe Host (Cadence PCIe Wrapper)
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description:
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Sophgo SG2042 PCIe host controller is based on the Cadence PCIe core.
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maintainers:
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- Chen Wang <unicorn_wang@outlook.com>
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properties:
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compatible:
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const: sophgo,sg2042-pcie-host
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reg:
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maxItems: 2
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reg-names:
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items:
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- const: reg
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- const: cfg
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vendor-id:
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const: 0x1f1c
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device-id:
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const: 0x2042
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msi-parent: true
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allOf:
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- $ref: cdns-pcie-host.yaml#
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required:
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- compatible
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- reg
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- reg-names
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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pcie@62000000 {
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compatible = "sophgo,sg2042-pcie-host";
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device_type = "pci";
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reg = <0x62000000 0x00800000>,
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<0x48000000 0x00001000>;
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reg-names = "reg", "cfg";
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#address-cells = <3>;
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#size-cells = <2>;
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ranges = <0x81000000 0 0x00000000 0xde000000 0 0x00010000>,
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<0x82000000 0 0xd0400000 0xd0400000 0 0x0d000000>;
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bus-range = <0x00 0xff>;
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vendor-id = <0x1f1c>;
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device-id = <0x2042>;
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cdns,no-bar-match-nbits = <48>;
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msi-parent = <&msi>;
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};
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