Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
19 lines
734 B
Plaintext
19 lines
734 B
Plaintext
|
|
ppc476gtr High Speed Serial Assist (HSTA) node
|
|
==============================================
|
|
|
|
The 476gtr SoC contains a high speed serial assist module attached
|
|
between the plb4 and plb6 system buses to provide high speed data
|
|
transfer between memory and system peripherals as well as support for
|
|
PCI message signalled interrupts.
|
|
|
|
Currently only the MSI support is used by Linux using the following
|
|
device tree entries:
|
|
|
|
Require properties:
|
|
- compatible : "ibm,476gtr-hsta-msi", "ibm,hsta-msi"
|
|
- reg : register mapping for the HSTA MSI space
|
|
- interrupts : ordered interrupt mapping for each MSI in the register
|
|
space. The first interrupt should be associated with a
|
|
register offset of 0x00, the second to 0x10, etc.
|