Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
61 lines
1.0 KiB
YAML
61 lines
1.0 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pwm/sophgo,sg2042-pwm.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Sophgo SG2042 PWM controller
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maintainers:
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- Chen Wang <unicorn_wang@outlook.com>
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description:
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This controller contains 4 channels which can generate PWM waveforms.
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allOf:
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- $ref: pwm.yaml#
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properties:
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compatible:
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enum:
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- sophgo,sg2042-pwm
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- sophgo,sg2044-pwm
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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clock-names:
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items:
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- const: apb
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resets:
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maxItems: 1
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"#pwm-cells":
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const: 3
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- resets
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/reset/sophgo,sg2042-reset.h>
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pwm@7f006000 {
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compatible = "sophgo,sg2042-pwm";
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reg = <0x7f006000 0x1000>;
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#pwm-cells = <3>;
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clocks = <&clock 67>;
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clock-names = "apb";
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resets = <&rstgen RST_PWM>;
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};
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