Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
65 lines
1.4 KiB
YAML
65 lines
1.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/reset/microchip,rst.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Microchip Sparx5 Switch Reset Controller
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maintainers:
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- Steen Hegelund <steen.hegelund@microchip.com>
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- Lars Povlsen <lars.povlsen@microchip.com>
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description: |
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The Microchip Sparx5 Switch provides reset control and implements the following
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functions
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- One Time Switch Core Reset (Soft Reset)
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properties:
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$nodename:
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pattern: "^reset-controller@[0-9a-f]+$"
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compatible:
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oneOf:
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- enum:
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- microchip,sparx5-switch-reset
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- microchip,lan966x-switch-reset
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- items:
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- enum:
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- microchip,lan9691-switch-reset
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- const: microchip,lan966x-switch-reset
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reg:
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items:
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- description: global control block registers
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reg-names:
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items:
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- const: gcb
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"#reset-cells":
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const: 1
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cpu-syscon:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: syscon used to access CPU reset
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required:
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- compatible
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- reg
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- reg-names
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- "#reset-cells"
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- cpu-syscon
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additionalProperties: false
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examples:
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- |
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reset: reset-controller@11010008 {
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compatible = "microchip,sparx5-switch-reset";
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reg = <0x11010008 0x4>;
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reg-names = "gcb";
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#reset-cells = <1>;
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cpu-syscon = <&cpu_ctrl>;
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};
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