Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
19 lines
680 B
Plaintext
19 lines
680 B
Plaintext
Microchip PIC32 Quad SPI controller
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-----------------------------------
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Required properties:
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- compatible: Should be "microchip,pic32mzda-sqi".
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- reg: Address and length of SQI controller register space.
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- interrupts: Should contain SQI interrupt.
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- clocks: Should contain phandle of two clocks in sequence, one that drives
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clock on SPI bus and other that drives SQI controller.
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- clock-names: Should be "spi_ck" and "reg_ck" in order.
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Example:
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sqi1: spi@1f8e2000 {
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compatible = "microchip,pic32mzda-sqi";
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reg = <0x1f8e2000 0x200>;
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clocks = <&rootclk REF2CLK>, <&rootclk PB5CLK>;
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clock-names = "spi_ck", "reg_ck";
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interrupts = <169 IRQ_TYPE_LEVEL_HIGH>;
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};
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