Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
93 lines
2.3 KiB
YAML
93 lines
2.3 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/watchdog/mediatek,mtk-wdt.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: MediaTek SoCs Watchdog timer
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maintainers:
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- Matthias Brugger <matthias.bgg@gmail.com>
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description:
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The watchdog supports a pre-timeout interrupt that fires
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timeout-sec/2 before the expiry.
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allOf:
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- $ref: watchdog.yaml#
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properties:
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compatible:
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oneOf:
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- enum:
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- mediatek,mt2712-wdt
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- mediatek,mt6589-wdt
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- mediatek,mt6735-wdt
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- mediatek,mt6795-wdt
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- mediatek,mt7986-wdt
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- mediatek,mt7988-wdt
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- mediatek,mt8183-wdt
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- mediatek,mt8186-wdt
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- mediatek,mt8188-wdt
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- mediatek,mt8192-wdt
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- mediatek,mt8195-wdt
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- items:
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- enum:
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- mediatek,mt2701-wdt
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- mediatek,mt6572-wdt
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- mediatek,mt6582-wdt
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- mediatek,mt6797-wdt
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- mediatek,mt7622-wdt
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- mediatek,mt7623-wdt
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- mediatek,mt7629-wdt
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- mediatek,mt8173-wdt
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- mediatek,mt8188-wdt
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- mediatek,mt8189-wdt
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- mediatek,mt8365-wdt
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- mediatek,mt8516-wdt
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- const: mediatek,mt6589-wdt
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reg:
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maxItems: 1
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interrupts:
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items:
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- description: Watchdog pre-timeout (bark) interrupt
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mediatek,disable-extrst:
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description: Disable sending output reset signal
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type: boolean
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mediatek,reset-by-toprgu:
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description: The Top Reset Generation Unit (TOPRGU) generates reset signals
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and distributes them to each IP. If present, the watchdog timer will be
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reset by TOPRGU once system resets.
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type: boolean
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'#reset-cells':
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const: 1
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required:
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- compatible
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- reg
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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watchdog: watchdog@10007000 {
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compatible = "mediatek,mt8183-wdt";
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reg = <0 0x10007000 0 0x100>;
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interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_LOW>;
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mediatek,disable-extrst;
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timeout-sec = <10>;
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#reset-cells = <1>;
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};
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};
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