Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
73 lines
1.4 KiB
Devicetree
73 lines
1.4 KiB
Devicetree
// SPDX-License-Identifier: ISC
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/*
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* Device Tree file for the Intel IXDP425 also known as IXCDP1100 Control Plane
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* processor reference design.
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*
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* This platform has the codename "Richfield".
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*
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* This machine is based on a 533 MHz IXP425.
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*/
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/dts-v1/;
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#include "intel-ixp42x.dtsi"
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#include "intel-ixp4xx-reference-design.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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model = "Intel IXDP425/IXCDP1100 Richfield Reference Design";
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compatible = "intel,ixdp425", "intel,ixp42x";
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#address-cells = <1>;
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#size-cells = <1>;
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soc {
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bus@c4000000 {
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flash@0,0 {
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compatible = "intel,ixp4xx-flash", "cfi-flash";
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bank-width = <2>;
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/* Enable writes on the expansion bus */
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intel,ixp4xx-eb-write-enable = <1>;
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/* 16 MB of Flash mapped in at CS0 */
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reg = <0 0x00000000 0x1000000>;
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partitions {
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compatible = "redboot-fis";
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/* Eraseblock at 0x0fe0000 */
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fis-index-block = <0x7f>;
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};
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};
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};
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/* EthB */
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ethernet@c8009000 {
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status = "okay";
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queue-rx = <&qmgr 3>;
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queue-txready = <&qmgr 20>;
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phy-mode = "rgmii";
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phy-handle = <&phy0>;
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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phy1: ethernet-phy@1 {
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reg = <1>;
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};
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};
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};
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/* EthC */
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ethernet@c800a000 {
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status = "okay";
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queue-rx = <&qmgr 4>;
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queue-txready = <&qmgr 21>;
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phy-mode = "rgmii";
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phy-handle = <&phy1>;
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};
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};
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};
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