Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
56 lines
899 B
Devicetree
56 lines
899 B
Devicetree
// SPDX-License-Identifier: GPL-2.0
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/*
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* Marvell OpenRD Ultimate Board Description
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*
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* Andrew Lunn <andrew@lunn.ch>
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*
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* This file contains the definitions that are specific to OpenRD
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* ultimate variant of the Marvell Kirkwood Development Board.
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*/
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/dts-v1/;
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#include "kirkwood-openrd.dtsi"
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/ {
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model = "OpenRD Ultimate";
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compatible = "marvell,openrd-ultimate", "marvell,openrd", "marvell,kirkwood-88f6281", "marvell,kirkwood";
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ocp@f1000000 {
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i2c@11000 {
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status = "okay";
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clock-frequency = <400000>;
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cs42l51: cs42l51@4a {
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compatible = "cirrus,cs42l51";
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reg = <0x4a>;
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};
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};
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};
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};
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&mdio {
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status = "okay";
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ethphy0: ethernet-phy@0 {
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reg = <0>;
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};
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ethphy1: ethernet-phy@1 {
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reg = <1>;
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};
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};
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ð0 {
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status = "okay";
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ethernet0-port@0 {
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phy-handle = <ðphy0>;
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};
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};
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ð1 {
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status = "okay";
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ethernet1-port@0 {
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phy-handle = <ðphy1>;
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};
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};
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