Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
53 lines
1.0 KiB
Devicetree
53 lines
1.0 KiB
Devicetree
/*
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* NXP LPC435x, LPC433x, LPC4327, LPC4325, LPC4317 and LPC4315 SoC
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*
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* Copyright 2015 Joachim Eastwood <manabian@gmail.com>
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*
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* This code is released using a dual license strategy: BSD/GPL
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* You can choose the licence that better fits your requirements.
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*
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* Released under the terms of 3-clause BSD License
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* Released under the terms of GNU General Public License Version 2.0
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*
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*/
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/ {
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compatible = "nxp,lpc4357";
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cpus {
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cpu@0 {
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compatible = "arm,cortex-m4";
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};
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};
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soc {
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sram0: sram@10000000 {
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compatible = "mmio-sram";
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reg = <0x10000000 0x8000>; /* 32 KiB local SRAM */
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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};
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sram1: sram@10080000 {
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compatible = "mmio-sram";
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reg = <0x10080000 0xa000>; /* 32 + 8 KiB local SRAM */
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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};
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sram2: sram@20000000 {
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compatible = "mmio-sram";
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reg = <0x20000000 0x10000>; /* 4 x 16 KiB AHB SRAM */
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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};
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};
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};
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&eeprom {
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status = "okay";
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};
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