Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
40 lines
711 B
Devicetree
40 lines
711 B
Devicetree
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (c) 2020 thingy.jp.
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* Author: Daniel Palmer <daniel@thingy.jp>
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*/
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#include "mstar-infinity.dtsi"
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&cpu0_opp_table {
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opp-1000000000 {
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opp-hz = /bits/ 64 <1000000000>;
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opp-microvolt = <1000000>;
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clock-latency-ns = <300000>;
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};
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opp-1200000000 {
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opp-hz = /bits/ 64 <1200000000>;
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opp-microvolt = <1000000>;
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clock-latency-ns = <300000>;
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};
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};
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&cpus {
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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operating-points-v2 = <&cpu0_opp_table>;
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reg = <0x1>;
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clocks = <&cpupll>;
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clock-names = "cpuclk";
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};
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};
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&riu {
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smpctrl: smpctrl@204000 {
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reg = <0x204000 0x200>;
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status = "disabled";
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};
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};
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