Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
49 lines
1.2 KiB
C
49 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2012 Samsung Electronics.
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*
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* Exynos - SMC Call
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*/
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#ifndef __ASM_ARCH_EXYNOS_SMC_H
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#define __ASM_ARCH_EXYNOS_SMC_H
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#define SMC_CMD_INIT (-1)
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#define SMC_CMD_INFO (-2)
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/* For Power Management */
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#define SMC_CMD_SLEEP (-3)
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#define SMC_CMD_CPU1BOOT (-4)
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#define SMC_CMD_CPU0AFTR (-5)
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#define SMC_CMD_SAVE (-6)
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#define SMC_CMD_SHUTDOWN (-7)
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/* For CP15 Access */
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#define SMC_CMD_C15RESUME (-11)
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/* For L2 Cache Access */
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#define SMC_CMD_L2X0CTRL (-21)
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#define SMC_CMD_L2X0SETUP1 (-22)
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#define SMC_CMD_L2X0SETUP2 (-23)
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#define SMC_CMD_L2X0INVALL (-24)
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#define SMC_CMD_L2X0DEBUG (-25)
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/* For Accessing CP15/SFR (General) */
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#define SMC_CMD_REG (-101)
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/* defines for SMC_CMD_REG */
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#define SMC_REG_CLASS_SFR_W (0x1 << 30)
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#define SMC_REG_ID_SFR_W(addr) (SMC_REG_CLASS_SFR_W | ((addr) >> 2))
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#ifndef __ASSEMBLY__
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extern void exynos_smc(u32 cmd, u32 arg1, u32 arg2, u32 arg3);
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#endif /* __ASSEMBLY__ */
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/* op type for SMC_CMD_SAVE and SMC_CMD_SHUTDOWN */
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#define OP_TYPE_CORE 0x0
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#define OP_TYPE_CLUSTER 0x1
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/* Power State required for SMC_CMD_SAVE and SMC_CMD_SHUTDOWN */
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#define SMC_POWERSTATE_IDLE 0x1
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#endif
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