Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
46 lines
1.8 KiB
C
46 lines
1.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* AM33XX PRM_XXX register bits
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*
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* Copyright (C) 2011-2012 Texas Instruments Incorporated - https://www.ti.com/
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*/
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#ifndef __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_33XX_H
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#define __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_33XX_H
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#include "prm.h"
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#define AM33XX_GFX_MEM_ONSTATE_MASK (0x3 << 17)
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#define AM33XX_GFX_MEM_RETSTATE_MASK (1 << 6)
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#define AM33XX_GFX_MEM_STATEST_MASK (0x3 << 4)
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#define AM33XX_GLOBAL_WARM_SW_RST_MASK (1 << 1)
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#define AM33XX_RST_GLOBAL_WARM_SW_MASK (1 << 0)
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#define AM33XX_RST_GLOBAL_COLD_SW_MASK (1 << 1)
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#define AM33XX_PRUSS_MEM_ONSTATE_MASK (0x3 << 5)
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#define AM33XX_PRUSS_MEM_RETSTATE_MASK (1 << 7)
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#define AM33XX_PRUSS_MEM_STATEST_MASK (0x3 << 23)
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#define AM33XX_LASTPOWERSTATEENTERED_SHIFT 24
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#define AM33XX_LASTPOWERSTATEENTERED_MASK (0x3 << 24)
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#define AM33XX_LOGICRETSTATE_MASK (1 << 2)
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#define AM33XX_LOGICRETSTATE_3_3_MASK (1 << 3)
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#define AM33XX_LOGICSTATEST_SHIFT 2
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#define AM33XX_LOGICSTATEST_MASK (1 << 2)
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#define AM33XX_LOWPOWERSTATECHANGE_SHIFT 4
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#define AM33XX_LOWPOWERSTATECHANGE_MASK (1 << 4)
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#define AM33XX_MPU_L1_ONSTATE_MASK (0x3 << 18)
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#define AM33XX_MPU_L1_RETSTATE_MASK (1 << 22)
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#define AM33XX_MPU_L1_STATEST_MASK (0x3 << 6)
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#define AM33XX_MPU_L2_ONSTATE_MASK (0x3 << 20)
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#define AM33XX_MPU_L2_RETSTATE_MASK (1 << 23)
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#define AM33XX_MPU_L2_STATEST_MASK (0x3 << 8)
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#define AM33XX_MPU_RAM_ONSTATE_MASK (0x3 << 16)
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#define AM33XX_MPU_RAM_RETSTATE_MASK (1 << 24)
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#define AM33XX_MPU_RAM_STATEST_MASK (0x3 << 4)
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#define AM33XX_PER_MEM_ONSTATE_MASK (0x3 << 25)
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#define AM33XX_PER_MEM_RETSTATE_MASK (1 << 29)
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#define AM33XX_PER_MEM_STATEST_MASK (0x3 << 17)
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#define AM33XX_RAM_MEM_ONSTATE_MASK (0x3 << 30)
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#define AM33XX_RAM_MEM_RETSTATE_MASK (1 << 27)
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#define AM33XX_RAM_MEM_STATEST_MASK (0x3 << 21)
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#endif
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