Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
35 lines
816 B
C
35 lines
816 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright 2008 Openmoko, Inc.
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* Copyright 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* S3C64XX clock register definitions
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*/
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#ifndef __PLAT_REGS_CLOCK_H
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#define __PLAT_REGS_CLOCK_H __FILE__
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/*
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* FIXME: Remove remaining definitions
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*/
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#define S3C_CLKREG(x) (S3C_VA_SYS + (x))
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#define S3C_PCLK_GATE S3C_CLKREG(0x34)
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#define S3C6410_CLK_SRC2 S3C_CLKREG(0x10C)
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#define S3C_MEM_SYS_CFG S3C_CLKREG(0x120)
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/* PCLK GATE Registers */
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#define S3C_CLKCON_PCLK_UART3 (1<<4)
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#define S3C_CLKCON_PCLK_UART2 (1<<3)
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#define S3C_CLKCON_PCLK_UART1 (1<<2)
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#define S3C_CLKCON_PCLK_UART0 (1<<1)
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/* MEM_SYS_CFG */
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#define MEM_SYS_CFG_INDEP_CF 0x4000
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#define MEM_SYS_CFG_EBI_FIX_PRI_CFCON 0x30
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#endif /* _PLAT_REGS_CLOCK_H */
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