Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
107 lines
1.6 KiB
Devicetree
107 lines
1.6 KiB
Devicetree
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Device Tree file for Freescale LS1012A RDB Board.
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*
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* Copyright 2016 Freescale Semiconductor, Inc.
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*
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*/
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/dts-v1/;
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#include <dt-bindings/interrupt-controller/irq.h>
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#include "fsl-ls1012a.dtsi"
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/ {
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model = "LS1012A RDB Board";
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compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
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aliases {
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serial0 = &duart0;
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mmc0 = &esdhc0;
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mmc1 = &esdhc1;
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};
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};
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&duart0 {
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status = "okay";
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};
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&esdhc0 {
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sd-uhs-sdr104;
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sd-uhs-sdr50;
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sd-uhs-sdr25;
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sd-uhs-sdr12;
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status = "okay";
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};
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&esdhc1 {
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mmc-hs200-1_8v;
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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accelerometer@1e {
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compatible = "nxp,fxos8700";
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reg = <0x1e>;
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interrupt-parent = <&gpio26>;
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interrupts = <13 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "INT1";
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};
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gyroscope@20 {
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compatible = "nxp,fxas21002c";
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reg = <0x20>;
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};
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gpio@24 {
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compatible = "nxp,pcal9555a";
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reg = <0x24>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpio@25 {
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compatible = "nxp,pcal9555a";
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reg = <0x25>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpio26: gpio@26 {
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compatible = "nxp,pcal9555a";
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reg = <0x26>;
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interrupt-parent = <&gpio0>;
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interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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current-sensor@40 {
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compatible = "ti,ina220";
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reg = <0x40>;
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shunt-resistor = <2000>;
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};
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};
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&qspi {
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status = "okay";
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s25fs512s0: flash@0 {
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compatible = "jedec,spi-nor";
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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <50000000>;
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m25p,fast-read;
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reg = <0>;
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spi-rx-bus-width = <2>;
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spi-tx-bus-width = <2>;
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};
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};
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&sata {
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status = "okay";
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};
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