Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
151 lines
1.7 KiB
Devicetree
151 lines
1.7 KiB
Devicetree
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/*
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* Copyright 2022 Toradex
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*/
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/ {
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aliases {
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rtc0 = &rtc_i2c;
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rtc1 = &rtc;
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};
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reg_usb_host_vbus: regulator-usb-host-vbus {
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regulator-name = "VCC USBH2(ABCD) / USBH(3|4)";
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};
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};
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&adc0 {
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status = "okay";
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};
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&adc1 {
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status = "okay";
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};
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&amix {
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status = "okay";
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};
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&asrc0 {
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status = "okay";
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};
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/* TODO: Display Controller */
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/* TODO: DPU */
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/* Apalis ETH1 */
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&fec1 {
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status = "okay";
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};
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/* Apalis I2C1 */
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&i2c2 {
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status = "okay";
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/* M41T0M6 real time clock on carrier board */
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rtc_i2c: rtc@68 {
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status = "okay";
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};
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};
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/* Apalis I2C3 (CAM) */
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&i2c3 {
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status = "okay";
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};
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/* Apalis SPI1 */
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&lpspi0 {
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status = "okay";
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};
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/* Apalis SPI2 */
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&lpspi2 {
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status = "okay";
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};
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/* Apalis UART3 */
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&lpuart0 {
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status = "okay";
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};
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/* Apalis UART1 */
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&lpuart1 {
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status = "okay";
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};
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/* Apalis UART4 */
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&lpuart2 {
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status = "okay";
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};
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/* Apalis UART2 */
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&lpuart3 {
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status = "okay";
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};
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/* Apalis PWM3, MXM3 pin 6 */
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&lsio_pwm0 {
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status = "okay";
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};
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/* Apalis PWM4, MXM3 pin 8 */
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&lsio_pwm1 {
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status = "okay";
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};
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/* Apalis PWM1, MXM3 pin 2 */
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&lsio_pwm2 {
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status = "okay";
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};
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/* Apalis PWM2, MXM3 pin 4 */
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&lsio_pwm3 {
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status = "okay";
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};
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/* Apalis PCIE1 */
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&pciea {
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status = "okay";
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};
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/* Apalis BKL1_PWM */
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&pwm_lvds1 {
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status = "okay";
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};
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/* Apalis DAP1 */
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&sai1 {
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status = "okay";
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};
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&sai5 {
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status = "okay";
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};
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&sai5_lpcg {
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status = "okay";
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};
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/* Apalis SATA1 */
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&sata {
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status = "okay";
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};
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/* Apalis SPDIF1 */
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&spdif0 {
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status = "okay";
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};
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/* TODO: Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC Hub */
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/* Apalis USBO1 */
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&usbotg1 {
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status = "okay";
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};
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/* Apalis USBH4 SuperSpeed */
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&usbotg3_cdns3 {
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status = "okay";
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};
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