Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
34 lines
677 B
Devicetree
34 lines
677 B
Devicetree
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Based on rk3328-nanopi-r2s.dts, which is:
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* Copyright (c) 2020 David Bauer <mail@david-bauer.net>
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*/
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/dts-v1/;
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#include "rk3328-orangepi-r1-plus.dtsi"
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/ {
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model = "Xunlong Orange Pi R1 Plus";
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compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328";
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};
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&gmac2io {
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phy-handle = <&rtl8211e>;
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phy-mode = "rgmii";
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tx_delay = <0x24>;
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rx_delay = <0x18>;
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status = "okay";
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mdio {
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rtl8211e: ethernet-phy@1 {
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reg = <1>;
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pinctrl-0 = <ð_phy_reset_pin>;
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pinctrl-names = "default";
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reset-assert-us = <10000>;
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reset-deassert-us = <50000>;
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reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
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};
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};
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};
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