Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
42 lines
791 B
C
42 lines
791 B
C
// SPDX-License-Identifier: GPL-2.0-or-later
|
|
/*
|
|
* Cobalt time initialization.
|
|
*
|
|
* Copyright (C) 2007 Yoichi Yuasa <yuasa@linux-mips.org>
|
|
*/
|
|
#include <linux/i8253.h>
|
|
#include <linux/init.h>
|
|
|
|
#include <asm/gt64120.h>
|
|
#include <asm/time.h>
|
|
|
|
#define GT641XX_BASE_CLOCK 50000000 /* 50MHz */
|
|
|
|
void __init plat_time_init(void)
|
|
{
|
|
u32 start, end;
|
|
int i = HZ / 10;
|
|
|
|
setup_pit_timer();
|
|
|
|
gt641xx_set_base_clock(GT641XX_BASE_CLOCK);
|
|
|
|
/*
|
|
* MIPS counter frequency is measured during a 100msec interval
|
|
* using GT64111 timer0.
|
|
*/
|
|
while (!gt641xx_timer0_state())
|
|
;
|
|
|
|
start = read_c0_count();
|
|
|
|
while (i--)
|
|
while (!gt641xx_timer0_state())
|
|
;
|
|
|
|
end = read_c0_count();
|
|
|
|
mips_hpt_frequency = (end - start) * 10;
|
|
printk(KERN_INFO "MIPS counter frequency %dHz\n", mips_hpt_frequency);
|
|
}
|